From decc78659f34ded3f8f9fa5540159efa19330626 Mon Sep 17 00:00:00 2001 From: Jacques Comeaux Date: Tue, 7 Jul 2026 13:13:29 -0700 Subject: Update circuit typechecker --- Data/Circuit/Typecheck.agda | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/Data/Circuit/Typecheck.agda b/Data/Circuit/Typecheck.agda index e34ea44..b2c0e96 100644 --- a/Data/Circuit/Typecheck.agda +++ b/Data/Circuit/Typecheck.agda @@ -1,12 +1,14 @@ {-# OPTIONS --without-K --safe #-} +open import Level using (0ℓ) + module Data.Circuit.Typecheck where open import Data.SExp using (SExp) -open import Data.Circuit.Gate using (GateLabel; Gate) +open import Data.Circuit.Gate using (Gates; Gate) open import Data.Hypergraph.Label using (HypergraphLabel) -open import Data.Hypergraph.Edge GateLabel using (Edge) -open import Data.Hypergraph.Base GateLabel using (Hypergraph) +open import Data.Hypergraph.Edge {0ℓ} Gates using (Edge) +open import Data.Hypergraph {0ℓ} Gates using (Hypergraph) open import Data.List using (List; length) renaming (map to mapL) open import Data.List.Effectful using () renaming (module TraversableA to ListTraversable) @@ -14,7 +16,7 @@ open import Data.Maybe using (Maybe) renaming (map to mapM) open import Data.Nat using (ℕ; _