Data - circuits - Tiny circuits DSL

index : circuits

Tiny circuits DSL

jacques@jacquescomeaux.xyz

about summary refs log tree commit diff

path: root/Data

Mode	Name	Size
-rw-r--r--	Castable.agda	889	log plain
d---------	Hypergraph	37	log plain

generated by cgit v1.2.3 (git 2.39.1) at 2025-07-04 18:53:39 +0000