diff options
-rw-r--r-- | hexedit/Makefile (renamed from Makefile) | 2 | ||||
-rw-r--r-- | hexedit/clocks.s (renamed from clocks.s) | 0 | ||||
-rw-r--r-- | hexedit/gpio.s (renamed from gpio.s) | 0 | ||||
-rw-r--r-- | hexedit/hexedit.s | 25 | ||||
-rw-r--r-- | hexedit/main.s (renamed from main.s) | 0 | ||||
-rw-r--r-- | hexedit/pico_ram_only.ld (renamed from pico_ram_only.ld) | 0 | ||||
-rw-r--r-- | hexedit/uart.s (renamed from uart.s) | 42 | ||||
-rw-r--r-- | hexedit/xosc.s (renamed from xosc.s) | 2 | ||||
-rw-r--r-- | misc/blink.s (renamed from blink.s) | 4 | ||||
-rw-r--r-- | misc/pll.s (renamed from pll.s) | 8 |
10 files changed, 69 insertions, 14 deletions
diff --git a/Makefile b/hexedit/Makefile index 3529884..95f49ae 100644 --- a/Makefile +++ b/hexedit/Makefile @@ -3,7 +3,7 @@ all: build build: echo.uf2 echo.uf2: echo.elf - ./elf2uf2 echo.elf echo.uf2 + ../elf/elf2uf2 echo.elf echo.uf2 objects = main.o xosc.o clocks.o gpio.o uart.o diff --git a/clocks.s b/hexedit/clocks.s index 83bc9ff..83bc9ff 100644 --- a/clocks.s +++ b/hexedit/clocks.s diff --git a/hexedit/hexedit.s b/hexedit/hexedit.s new file mode 100644 index 0000000..0bc03a9 --- /dev/null +++ b/hexedit/hexedit.s @@ -0,0 +1,25 @@ +.syntax unified +.cpu cortex-m0plus +.thumb + +.type hexedit, %function +.global hexedit + +hexedit: + ldr r2, =0x20000100 + movs r1, 0 +getchar: + bl uart_recv + cmp r0, 'g + beq stop + subs r0, '0 // The ASCII char '0' + bmi next + lsls r1, 4 + adds r1, r0 + b getchar +next: + ldr r0, [r2, 0] + adds r2, 4 + b hexedit +stop: + b 0x20000100 diff --git a/pico_ram_only.ld b/hexedit/pico_ram_only.ld index eb2450e..eb2450e 100644 --- a/pico_ram_only.ld +++ b/hexedit/pico_ram_only.ld @@ -62,14 +62,12 @@ setup_uart: uart_send: ldr r1, =UART0_BASE + movs r3, 0b1 << 5 // TX FIFO full 1: ldr r2, [r1, UARTFR_OFST] - movs r3, 0b1 << 5 // TX FIFO full tst r2, r3 bne 1b - movs r2, 0xff - ands r0, r2 - str r0, [r1, UARTDR_OFST] + strb r0, [r1, UARTDR_OFST] bx lr .type uart_recv, %function @@ -77,10 +75,42 @@ uart_send: uart_recv: ldr r1, =UART0_BASE + movs r3, 0b1 << 4 // RX FIFO empty 1: ldr r2, [r1, UARTFR_OFST] - movs r3, 0b1 << 4 // RX FIFO empty tst r2, r3 bne 1b - ldr r0, [r1, UARTDR_OFST] + ldrb r0, [r1, UARTDR_OFST] bx lr + +.type send_hex, %function +.global send_hex + +send_hex: + push {lr} + movs r4, r0 + movs r0, '0 + bl uart_send + movs r0, 'x + bl uart_send + movs r5, 8 // eight nibbles in a word +0: + movs r0, 28 // rotate left 4 + rors r4, r0 + movs r0, 0xF // lowest nibble mask + ands r0, r4 + cmp r0, 0x9 // number or letter? + bhi 1f + adds r0, '0 + b 2f +1: + adds r0, 'A - 0xA +2: + bl uart_send + subs r5, 1 + bne 0b + movs r0, '\r + bl uart_send + movs r0, '\n + bl uart_send + pop {pc} @@ -12,7 +12,7 @@ start_xosc: ldr r1, =XOSC_BASE - movs r0, 47 // startup delay = 47 for 12Mhz crystal + movs r0, 47 // startup delay for 12Mhz crystal str r0, [r1, STARTUP_OFST] ldr r0, =0x00fabaa0 // enable str r0, [r1, CTRL_OFST] @@ -22,7 +22,7 @@ setup_led: str r0, [r1, 0] ldr r1, =SIO_BASE movs r0, 1 - lsls r0, r0, 25 // GPIO 25 (LED) output enable + lsls r0, 25 // GPIO 25 (LED) output enable str r0, [r1, GPIO_OE_SET_OFST] bx lr @@ -79,7 +79,7 @@ on_then_off: bl delay_quick str r2, [r1, GPIO_OUT_XOR_OFST] bl delay_quick - subs r0, r0, 1 + subs r0, 1 bne on_then_off done: pop {pc} @@ -37,9 +37,9 @@ start_pll: // set pl_sys post dividers to 12 (6 * 2) ldr r1, =PLL_SYS_BASE movs r0, 6 // POSTDIV1 = 6 - lsls r0, r0, 4 - adds r0, r0, 2 // POSTDIV2 = 2 - lsls r0, r0, 12 + lsls r0, 4 + adds r0, 2 // POSTDIV2 = 2 + lsls r0, 12 str r0, [r1, PRIM_OFST] // turn on main power and VCO ldr r1, =(PLL_SYS_BASE + ATOMIC_CLEAR) @@ -49,7 +49,7 @@ start_pll: ldr r1, =PLL_SYS_BASE vco_lock: ldr r2, [r1, CS_OFST] - lsrs r2, r2, 31 + lsrs r2, 31 beq vco_lock // turn on post divider power ldr r1, =(PLL_SYS_BASE + ATOMIC_CLEAR) |