diff options
| -rw-r--r-- | .gitignore | 1 | ||||
| -rw-r--r-- | assembler/Makefile | 21 | ||||
| -rw-r--r-- | assembler/main.s | 17 | ||||
| -rw-r--r-- | assembler/pico_ram_only.ld | 13 | ||||
| -rw-r--r-- | assembler/uart.s | 65 | ||||
| -rw-r--r-- | hexedit/Makefile | 6 | ||||
| -rw-r--r-- | hexedit/uart.s | 53 | ||||
| -rw-r--r-- | setup/Makefile | 14 | ||||
| -rw-r--r-- | setup/clocks.s (renamed from hexedit/clocks.s) | 0 | ||||
| -rw-r--r-- | setup/combine.ld | 5 | ||||
| -rw-r--r-- | setup/gpio.s (renamed from hexedit/gpio.s) | 0 | ||||
| -rw-r--r-- | setup/uart.s | 58 | ||||
| -rw-r--r-- | setup/xosc.s (renamed from hexedit/xosc.s) | 0 |
13 files changed, 198 insertions, 55 deletions
@@ -1,3 +1,4 @@ *.elf *.o *.uf2 +*.so diff --git a/assembler/Makefile b/assembler/Makefile new file mode 100644 index 0000000..96b7971 --- /dev/null +++ b/assembler/Makefile @@ -0,0 +1,21 @@ +all: build + +build: assemble.uf2 + +assemble.uf2: assemble.elf + ../elf/elf2uf2 assemble.elf assemble.uf2 + +objects = main.o uart.o assemble.o register.o octal.o opcode.o + +assemble.elf: $(objects) + arm-none-eabi-ld -T pico_ram_only.ld -o assemble.elf $(objects) ../setup/setup.so + +$(objects): %.o: %.s + arm-none-eabi-as -o $@ $< + +clean: + rm assemble.elf assemble.uf2 *.o + +flash: assemble.uf2 + [ -h /dev/disk/by-label/RPI-RP2 ] || sleep 2s + cat assemble.uf2 > /dev/disk/by-label/RPI-RP2 diff --git a/assembler/main.s b/assembler/main.s new file mode 100644 index 0000000..9a7fd89 --- /dev/null +++ b/assembler/main.s @@ -0,0 +1,17 @@ +.syntax unified +.cpu cortex-m0plus +.thumb + +.type main, %function +.global main + +main: + bl start_xosc + bl setup_clocks + bl setup_gpio + bl setup_uart +1: + bl assemble + movs r0, r6 + bl send_hex + b 1b diff --git a/assembler/pico_ram_only.ld b/assembler/pico_ram_only.ld new file mode 100644 index 0000000..eb2450e --- /dev/null +++ b/assembler/pico_ram_only.ld @@ -0,0 +1,13 @@ +ENTRY(main) + +MEMORY { + FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2M + SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 264K +} + +SECTIONS { + .text : { + *(.text) + . = ALIGN(4); + } > SRAM +} diff --git a/assembler/uart.s b/assembler/uart.s new file mode 100644 index 0000000..b845c8b --- /dev/null +++ b/assembler/uart.s @@ -0,0 +1,65 @@ +.syntax unified +.cpu cortex-m0plus +.thumb + +.equ UART0_BASE, 0x40034000 +.equ UARTDR_OFST, 0x00 +.equ UARTFR_OFST, 0x18 + +.type uart_send, %function +.global uart_send + +uart_send: + ldr r1, =UART0_BASE + movs r3, 0b1 << 5 // TX FIFO full +1: + ldr r2, [r1, UARTFR_OFST] + tst r2, r3 + bne 1b + strb r0, [r1, UARTDR_OFST] + bx lr + +.type uart_recv, %function +.global uart_recv + +uart_recv: + ldr r1, =UART0_BASE + movs r3, 0b1 << 4 // RX FIFO empty +1: + ldr r2, [r1, UARTFR_OFST] + tst r2, r3 + bne 1b + ldrb r0, [r1, UARTDR_OFST] + bx lr + +.type send_hex, %function +.global send_hex + +send_hex: + push {lr} + movs r4, r0 + movs r0, '0 + bl uart_send + movs r0, 'x + bl uart_send + movs r5, 8 // eight nibbles in a word +0: + movs r0, 28 // rotate left 4 + rors r4, r0 + movs r0, 0xF // lowest nibble mask + ands r0, r4 + cmp r0, 0x9 // number or letter? + bhi 1f + adds r0, '0 + b 2f +1: + adds r0, ('A - 0xA) +2: + bl uart_send + subs r5, 1 + bne 0b + movs r0, '\r + bl uart_send + movs r0, '\n + bl uart_send + pop {pc} diff --git a/hexedit/Makefile b/hexedit/Makefile index 23941da..2ff0812 100644 --- a/hexedit/Makefile +++ b/hexedit/Makefile @@ -5,10 +5,10 @@ build: echo.uf2 echo.uf2: echo.elf ../elf/elf2uf2 echo.elf echo.uf2 -objects = main.o xosc.o clocks.o gpio.o uart.o +objects = main.o uart.o echo.elf: $(objects) - arm-none-eabi-ld -T pico_ram_only.ld -o echo.elf $(objects) + arm-none-eabi-ld -T pico_ram_only.ld -o echo.elf $(objects) ../setup/setup.so $(objects): %.o: %.s arm-none-eabi-as -o $@ $< @@ -17,5 +17,5 @@ clean: rm echo.elf echo.uf2 *.o flash: echo.uf2 - [ -h /dev/disk/by-label/RPI-RP2 ] || sleep 2s + [ -h /dev/disk/by-label/RPI-RP2 ] || sleep 3s cat echo.uf2 > /dev/disk/by-label/RPI-RP2 diff --git a/hexedit/uart.s b/hexedit/uart.s index 9804e53..b845c8b 100644 --- a/hexedit/uart.s +++ b/hexedit/uart.s @@ -2,60 +2,9 @@ .cpu cortex-m0plus .thumb -.equ RESETS_BASE, 0x4000c000 -.equ RESET_OFST, 0x0 -.equ RESET_DONE_OFST, 0x8 - -.equ IO_BANK0_BASE, 0x40014000 -.equ GPIO0_CTRL_OFST, 0x04 -.equ GPIO1_CTRL_OFST, 0x0c - .equ UART0_BASE, 0x40034000 .equ UARTDR_OFST, 0x00 .equ UARTFR_OFST, 0x18 -.equ UARTIBRD_OFST, 0x24 -.equ UARTFBRD_OFST, 0x28 -.equ UARTLCR_H_OFST, 0x2c -.equ UARTCR_OFST, 0x30 - -.equ ATOMIC_SET, 0x2000 -.equ ATOMIC_CLEAR, 0x3000 - -.type setup_uart, %function -.global setup_uart - -setup_uart: - - // Deassert reset - ldr r1, =(RESETS_BASE + ATOMIC_CLEAR) - movs r0, 0b1 // UART0 - lsls r0, 22 - str r0, [r1, RESET_OFST] - ldr r1, =RESETS_BASE -1: - ldr r2, [r1, RESET_DONE_OFST] - tst r2, r0 - beq 1b - - // Configure and enable - ldr r1, =UART0_BASE - movs r0, 6 - str r0, [r1, UARTIBRD_OFST] - movs r0, 33 - str r0, [r1, UARTFBRD_OFST] - movs r0, 0b111 << 4 // 0b11 = word len 8 bits, 0b1 = FIFO enabled - str r0, [r1, UARTLCR_H_OFST] - ldr r1, =(UART0_BASE + ATOMIC_SET) - movs r0, 0b1 // UART enable - str r0, [r1, UARTCR_OFST] - - // Configure GPIO 0 and 1 as TX and RX - ldr r1, =IO_BANK0_BASE - movs r0, 2 // UART function - str r0, [r1, GPIO0_CTRL_OFST] - str r0, [r1, GPIO1_CTRL_OFST] - - bx lr .type uart_send, %function .global uart_send @@ -104,7 +53,7 @@ send_hex: adds r0, '0 b 2f 1: - adds r0, 'A - 0xA + adds r0, ('A - 0xA) 2: bl uart_send subs r5, 1 diff --git a/setup/Makefile b/setup/Makefile new file mode 100644 index 0000000..5b6dbe7 --- /dev/null +++ b/setup/Makefile @@ -0,0 +1,14 @@ +all: build + +build: setup.so + +objects = xosc.o clocks.o gpio.o uart.o + +setup.so: $(objects) + arm-none-eabi-ld -r -T combine.ld -o setup.so $(objects) + +$(objects): %.o: %.s + arm-none-eabi-as -o $@ $< + +clean: + rm setup.so *.o diff --git a/hexedit/clocks.s b/setup/clocks.s index 83bc9ff..83bc9ff 100644 --- a/hexedit/clocks.s +++ b/setup/clocks.s diff --git a/setup/combine.ld b/setup/combine.ld new file mode 100644 index 0000000..29a70f0 --- /dev/null +++ b/setup/combine.ld @@ -0,0 +1,5 @@ +SECTIONS { + .text : { + *(.text) + } +} diff --git a/hexedit/gpio.s b/setup/gpio.s index 32e2c37..32e2c37 100644 --- a/hexedit/gpio.s +++ b/setup/gpio.s diff --git a/setup/uart.s b/setup/uart.s new file mode 100644 index 0000000..d4b81d2 --- /dev/null +++ b/setup/uart.s @@ -0,0 +1,58 @@ +.syntax unified +.cpu cortex-m0plus +.thumb + +.equ RESETS_BASE, 0x4000c000 +.equ RESET_OFST, 0x0 +.equ RESET_DONE_OFST, 0x8 + +.equ IO_BANK0_BASE, 0x40014000 +.equ GPIO0_CTRL_OFST, 0x04 +.equ GPIO1_CTRL_OFST, 0x0c + +.equ UART0_BASE, 0x40034000 +.equ UARTDR_OFST, 0x00 +.equ UARTFR_OFST, 0x18 +.equ UARTIBRD_OFST, 0x24 +.equ UARTFBRD_OFST, 0x28 +.equ UARTLCR_H_OFST, 0x2c +.equ UARTCR_OFST, 0x30 + +.equ ATOMIC_SET, 0x2000 +.equ ATOMIC_CLEAR, 0x3000 + +.type setup_uart, %function +.global setup_uart + +setup_uart: + + // Deassert reset + ldr r1, =(RESETS_BASE + ATOMIC_CLEAR) + movs r0, 0b1 // UART0 + lsls r0, 22 + str r0, [r1, RESET_OFST] + ldr r1, =RESETS_BASE +1: + ldr r2, [r1, RESET_DONE_OFST] + tst r2, r0 + beq 1b + + // Configure and enable + ldr r1, =UART0_BASE + movs r0, 6 + str r0, [r1, UARTIBRD_OFST] + movs r0, 33 + str r0, [r1, UARTFBRD_OFST] + movs r0, 0b111 << 4 // 0b11 = word len 8 bits, 0b1 = FIFO enabled + str r0, [r1, UARTLCR_H_OFST] + ldr r1, =(UART0_BASE + ATOMIC_SET) + movs r0, 0b1 // UART enable + str r0, [r1, UARTCR_OFST] + + // Configure GPIO 0 and 1 as TX and RX + ldr r1, =IO_BANK0_BASE + movs r0, 2 // UART function + str r0, [r1, GPIO0_CTRL_OFST] + str r0, [r1, GPIO1_CTRL_OFST] + + bx lr diff --git a/hexedit/xosc.s b/setup/xosc.s index 63760da..63760da 100644 --- a/hexedit/xosc.s +++ b/setup/xosc.s |