From 420bc15ae16b736fbce1a4846126cd983dd3b75b Mon Sep 17 00:00:00 2001 From: Jacques Comeaux Date: Sun, 7 Jul 2024 16:21:09 -0500 Subject: Fix PP and PL instructions --- assembler/Makefile | 20 ++++++++++++++------ assembler/assemble.s | 13 ++++++------- assembler/opcode.s | 13 +++++++++---- 3 files changed, 29 insertions(+), 17 deletions(-) (limited to 'assembler') diff --git a/assembler/Makefile b/assembler/Makefile index 96b7971..0225069 100644 --- a/assembler/Makefile +++ b/assembler/Makefile @@ -1,6 +1,4 @@ -all: build - -build: assemble.uf2 +PICO = /dev/disk/by-label/RPI-RP2 assemble.uf2: assemble.elf ../elf/elf2uf2 assemble.elf assemble.uf2 @@ -13,9 +11,19 @@ assemble.elf: $(objects) $(objects): %.o: %.s arm-none-eabi-as -o $@ $< +.PHONY: clean clean: rm assemble.elf assemble.uf2 *.o -flash: assemble.uf2 - [ -h /dev/disk/by-label/RPI-RP2 ] || sleep 2s - cat assemble.uf2 > /dev/disk/by-label/RPI-RP2 +.PHONY: flash +flash: $(PICO) assemble.uf2 + cat assemble.uf2 > $(PICO) + +.PHONY: check +check: $(PICO) + @echo Ready to flash + +$(PICO): + @echo "RPI-RP2 bootloader drive not found" + @echo Connect the pico with USB cable while holding bootsel button + @false diff --git a/assembler/assemble.s b/assembler/assemble.s index 04bfb6c..9517864 100644 --- a/assembler/assemble.s +++ b/assembler/assemble.s @@ -10,20 +10,19 @@ // - test each instruction // - decide on additional push or pops // - add GO to get_char -// - PP and PL are broken (end char) assemble: PUSH {LR} LDR R0, =uart_send LDR R1, =get_char - ADDS R0, 1 - ADDS R1, 1 + // ADDS R0, 1 + // ADDS R1, 1 MOV R9, R0 MOV R10, R1 MOVS R6, 0 MOVS R0, ' MOV R8, R0 LDR R1, =opcode - ADDS R1, 1 + // ADDS R1, 1 BLX R1 MOV R0, R8 BLX R9 @@ -31,7 +30,7 @@ assemble: PUSH {LR} main_loop: LSRS R0, R7, 8 // just peek BNE skip // if more stuff then skip MOVS R0, '\r - MOV R8, R0 //set end char to carriage return + MOV R8, R0 // set end char to carriage return skip: UXTB R0, R7 // store lsb in R0 LSRS R1, R0, 4 // upper nibble CMP R1, 0xC // if 0xxxxxxx or 10xxxxxx @@ -42,7 +41,7 @@ handle_reg: MOVS R1, (1<<4) // bit 4 mask // if 111xyyyy ANDS R0, R1 // get bit 4 ADDS R0, 3 // add 3 to it (now 3 or 4) LDR R1, =register - ADDS R1, 1 + // ADDS R1, 1 BLX R1 MOVS R0, 0x0F // lower nibble mask ANDS R0, R7 // store shift amount in R0 @@ -66,7 +65,7 @@ fin: LSLS R0, R2 handle_imm: MOVS R1, 0x0F // lower nibble mask ANDS R0, R1 // store immediate width in R0 LDR R1, =octal - ADDS R1, 1 + // ADDS R1, 1 BLX R1 // result is put in R4 LSLS R0, R7, 27 LSRS R0, 31 diff --git a/assembler/opcode.s b/assembler/opcode.s index 588d938..72f239f 100644 --- a/assembler/opcode.s +++ b/assembler/opcode.s @@ -39,12 +39,17 @@ opcode: PUSH {LR} CMP R0, R1 // check if input matches char BNE 20b // if not match try next option BLX R9 // echo char send if match - LDR R4, [R5, 4] // load parse instruction or offset + LDRB R1, [R5, 2] // load set end char byte + TST R1, R1 // test value + BEQ 40f // if zero skip set end char + LDRB R1, [R5, 3] // load new end char + MOV R8, R1 // set new end char +40: LDR R4, [R5, 4] // load parse instruction or offset LDRB R1, [R5, 1] // load parse instruction vs offset byte TST R1, R1 // check if zero BNE 10b // non-zero means it's an address -40: BLX R10 - BNE 40b +50: BLX R10 + BNE 50b POP {PC} // zero means it's a parse instruction .align 4 @@ -56,7 +61,7 @@ start: .byte 'D, 0x01 ; .hword 0x0000 ; .word D .byte 'J, 0x01 ; .hword 0x0000 ; .word J .byte 'L, 0x01 ; .hword 0x0000 ; .word L - .byte 'P, 0x01 ; .hword 0x0000 ; .word P + .byte 'P, 0x01 , 0x01, '\r ; .word P .byte 'Q, 0x00 ; .hword 0x0000 ; .word 0x0000C6DA // QUOTE imm10 imm6 .byte 'R, 0x01 ; .hword 0x0000 ; .word R .byte 'S, 0x01 ; .hword 0x0000 ; .word S -- cgit v1.2.3