From a2d08934b4d927b6a10dd9d8e09627d29e7c00e7 Mon Sep 17 00:00:00 2001 From: Jacques Comeaux Date: Sat, 20 Jul 2024 21:55:59 -0500 Subject: Simplify test program --- misc/demo.s | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) (limited to 'misc') diff --git a/misc/demo.s b/misc/demo.s index 1191b24..5aabd58 100644 --- a/misc/demo.s +++ b/misc/demo.s @@ -4,17 +4,13 @@ .align 4 -ECHO: LDR R1, [PC, #20] // 00 044405 0x00 0x4905 UART0_BASE - MOVS R3, 0x10 // 02 021420 0x02 0x2310 RX FIFO EMPTY -1: LDR R2, [R1, 0x18] // 04 064612 0x04 0x698A UARTFR_OFST - TST R2, R3 // 06 041032 0x06 0x421A - BNE 1b // 10 150774 0x08 0xD1FC - LDRB R0, [R1] // 12 074010 0x0A 0x7808 UARTDR_OFST - MOVS R3, 0x20 // 14 021440 0x0C 0x2320 TX FIFO FULL -1: LDR R2, [R1, 0x18] // 16 064612 0x0E 0x698A UARTFR_OFST - TST R2, R3 // 20 041032 0x10 0x421A - BNE 1b // 22 150774 0x12 0xD1FC - STRB R0, [R1] // 24 070010 0x14 0x7008 UARTDR_OFST - B ECHO // 26 163763 0x16 0xE7F3 - .WORD 0x40034000 // 30 040000 0x18 0x4000 - // 32 040003 0x1A 0x4003 +ECHO: LDR R1, [PC, #12] // 00 044405 0x00 0x4903 LL R1 3 UART0_BASE + MOVS R3, 0x30 // 02 021420 0x02 0x2310 DI R3 60 RX FIFO EMPTY or TX FIFO FULL +1: LDR R2, [R1, 0x18] // 04 064612 0x04 0x698A LI5 R2 R1 6 UARTFR_OFST + TST R2, R3 // 06 041032 0x06 0x421A BT R2 R3 + BNE 1b // 10 150774 0x08 0xD1FC JN 374 + LDRB R0, [R1] // 12 074010 0x0A 0x7808 LBI R0 R1 0 UARTDR_OFST + STRB R0, [R1] // 14 070010 0x0C 0x7008 SBI R0 R1 0 UARTDR_OFST + B 1b // 16 163763 0x0E 0xE7F9 JA 3771 + .WORD 0x40034000 // 20 040000 0x10 0x4000 Q 0400 00 + // 22 040003 0x12 0x4003 Q 0400 03 -- cgit v1.2.3