Fix UART bugs

1 files changed, 17 insertions, 4 deletions

diff --git a/clocks.s b/clocks.s
index 74bd215..83bc9ff 100644
--- a/clocks.s
+++ b/clocks.s
@@ -3,16 +3,29 @@
 .thumb
 
 .equ CLOCKS_BASE, 0x40008000
-.equ CLK_REF_CTRL_OFST, 0x30
-.equ CLK_SYS_CTRL_OFST, 0x3c
+.equ CLK_REF_CTRL_OFST,  0x30
+.equ CLK_SYS_CTRL_OFST,  0x3c
+.equ CLK_PERI_CTRL_OFST, 0x48
 
 .type setup_clocks, %function
 .global setup_clocks
 
 setup_clocks:
+
   ldr r1, =CLOCKS_BASE
-  movs r0, 2 // use xosc (=0x2) as clk_ref source
+
+  // Reference clock
+  movs r0, 0x2 // src = xosc
   str r0, [r1, CLK_REF_CTRL_OFST]
-  movs r0, 1 // use auxsrc (default pll_sys, =0x1) as clk_sys source
+
+  // System clock
+  movs r0, 0x0 // src = clk_ref
   str r0, [r1, CLK_SYS_CTRL_OFST]
+
+  // Peripheral clock
+  movs r0, 1 // set enable
+  lsls r0, 11
+  adds r0, 0x4 << 5 // src = xosc
+  str r0, [r1, CLK_PERI_CTRL_OFST]
+
   bx lr