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authorJacques Comeaux <jacquesrcomeaux@protonmail.com>2024-01-17 18:13:46 -0600
committerJacques Comeaux <jacquesrcomeaux@protonmail.com>2024-01-17 18:13:46 -0600
commit473e52cbe7cbee0333b7d97d91c4bbf95c1b3225 (patch)
tree2cfac6ef6e01b65471cc8afedb109066a552c97a /gpio.s
parent0a843c64d172c1709ea780c43867933c670f4ee4 (diff)
Fix UART bugs
Diffstat (limited to 'gpio.s')
-rw-r--r--gpio.s8
1 files changed, 3 insertions, 5 deletions
diff --git a/gpio.s b/gpio.s
index 1ef296c..32e2c37 100644
--- a/gpio.s
+++ b/gpio.s
@@ -2,7 +2,7 @@
.cpu cortex-m0plus
.thumb
-.equ RESETS_BASE, 0x4000c000
+.equ RESETS_BASE, 0x4000c000
.equ RESET_OFST, 0x0
.equ RESET_DONE_OFST, 0x8
@@ -12,14 +12,12 @@
.global setup_gpio
setup_gpio:
- // clear reset
ldr r1, =(RESETS_BASE + ATOMIC_CLEAR)
- movs r0, 0x20 // IO_BANK0 is bit 5
+ movs r0, 0b1 << 5 // IO_BANK0
str r0, [r1, RESET_OFST]
ldr r1, =RESETS_BASE
1:
ldr r2, [r1, RESET_DONE_OFST]
- tst r0, r2 // IO_BANK0 is still bit 5
- // wait for reset done
+ tst r2, r0
beq 1b
bx lr