Improve octedit usability

New features:
- Displays current address
- Press 'B' to go back

7 files changed, 141 insertions, 35 deletions

diff --git a/octedit/Makefile b/octedit/Makefile
index 26601c8..4603ef4 100644
--- a/octedit/Makefile
+++ b/octedit/Makefile
@@ -5,10 +5,10 @@ build: octedit.uf2
 octedit.uf2: octedit.elf
 	../elf/elf2uf2 octedit.elf octedit.uf2
 
-objects = uart.o main.o octedit.o
+objects = setup.o octedit.o uart.o crc.o
 
 octedit.elf: $(objects)
-	arm-none-eabi-ld -T pico_persist.ld -o octedit.elf $(objects) ../setup/setup.so
+	arm-none-eabi-ld -T pico_persist.ld -o octedit.elf $(objects)
 	./checksum_pico_elf.py octedit.elf
 
 $(objects): %.o: %.s
diff --git a/octedit/crc.s b/octedit/crc.s
new file mode 100644
index 0000000..8019c6d
--- /dev/null
+++ b/octedit/crc.s
@@ -0,0 +1,6 @@
+.syntax unified
+.cpu cortex-m0plus
+.thumb
+
+.section .stage_2_crc
+.word 0x00000000
diff --git a/octedit/main.s b/octedit/main.s
deleted file mode 100644
index 6c471ec..0000000
--- a/octedit/main.s
+++ /dev/null
@@ -1,18 +0,0 @@
-.syntax unified
-.cpu cortex-m0plus
-.thumb
-
-.section .entry, "ax"
-
-.type main, %function
-.global main
-
-main:
-  bl start_xosc
-  bl setup_clocks
-  bl setup_gpio
-  bl setup_uart
-  b octedit
-
-.section .stage_2_crc
-.word 0x00000000
diff --git a/octedit/octedit.s b/octedit/octedit.s
index 9445fd8..7d9e7f4 100644
--- a/octedit/octedit.s
+++ b/octedit/octedit.s
@@ -11,24 +11,47 @@ octedit:
   ldr r6, =SRAM_BASE
   adds r5, r6, 1
 10:
-  movs r4, 0
+  movs r4, 11
+  movs r0, 0x1E
+  rors r6, r0
+  movs r0, 0x01
+  b 1f
+0:
+  movs r0, 0x1D
+  rors r6, r0
+  movs r0, 0x07
+1:
+  ands r0, r6
+  adds r0, 0x30
+  bl uart_send
+  subs r4, 1
+  bne 0b
+  movs r0, ' 
+  bl uart_send
 20:
   bl uart_recv
   cmp r0, '\r
-  beq 30f
-  cmp r0, 'G
-  beq 40f
-  bl uart_send
-  subs r0, '0
-  lsls r4, 3
-  adds r4, r0
-  b 20b
-30:
+  bne 30f
   bl uart_send
   movs r0, '\n
   bl uart_send
   strh r4, [r6]
   adds r6, 2
   b 10b
-40:
+30:
+  cmp r0, 'G
+  bne 40f
   bx r5
+40:
+  cmp r0, 'B
+  bne 50f
+  movs r0, '\r
+  bl uart_send
+  subs r6, 2
+  b 10b
+50:
+  bl uart_send
+  subs r0, '0
+  lsls r4, 3
+  adds r4, r0
+  b 20b
diff --git a/octedit/pico_persist.ld b/octedit/pico_persist.ld
index 9c37aba..fd9cf67 100644
--- a/octedit/pico_persist.ld
+++ b/octedit/pico_persist.ld
@@ -5,8 +5,9 @@ MEMORY {
 
 SECTIONS {
   .text : {
-    *(.entry);
-    *(.text);
+    setup.o(.text);
+    octedit.o(.text);
+    uart.o(.text);
     . = 252;
     *(.stage_2_crc);
   } >SRAM AT>FLASH
diff --git a/octedit/setup.s b/octedit/setup.s
new file mode 100644
index 0000000..378b54e
--- /dev/null
+++ b/octedit/setup.s
@@ -0,0 +1,94 @@
+.syntax unified
+.cpu cortex-m0plus
+.thumb
+
+.equ XOSC_BASE, 0x40024000
+.equ CTRL_OFST, 0x0
+.equ STATUS_OFST, 0x4
+.equ STARTUP_OFST, 0xc
+
+.equ CLOCKS_BASE, 0x40008000
+.equ CLK_REF_CTRL_OFST,  0x30
+.equ CLK_SYS_CTRL_OFST,  0x3c
+.equ CLK_PERI_CTRL_OFST, 0x48
+
+.equ RESETS_BASE, 0x4000c000
+.equ RESET_OFST,      0x0
+.equ RESET_DONE_OFST, 0x8
+
+.equ IO_BANK0_BASE, 0x40014000
+.equ GPIO0_CTRL_OFST, 0x04
+.equ GPIO1_CTRL_OFST, 0x0c
+
+.equ UART0_BASE, 0x40034000
+.equ UARTDR_OFST,     0x00
+.equ UARTFR_OFST,     0x18
+.equ UARTIBRD_OFST,   0x24
+.equ UARTFBRD_OFST,   0x28
+.equ UARTLCR_H_OFST,  0x2c
+.equ UARTCR_OFST,     0x30
+
+.equ ATOMIC_SET,    0x2000
+.equ ATOMIC_CLEAR,  0x3000
+
+.type setup, %function
+.global setup
+
+setup:
+
+  // XOSC
+  ldr r1, =XOSC_BASE
+  movs r0, 47 // startup delay for 12Mhz crystal
+  str r0, [r1, STARTUP_OFST]
+  ldr r0, =0x00fabaa0 // enable
+  str r0, [r1, CTRL_OFST]
+1:
+  ldr r0, [r1, STATUS_OFST]
+  lsrs r0, 31 // stable bit
+  beq 1b
+
+  // Clocks
+  ldr r1, =CLOCKS_BASE
+  // Reference clock
+  movs r0, 0x2 // src = xosc
+  str r0, [r1, CLK_REF_CTRL_OFST]
+  // System clock
+  movs r0, 0x0 // src = clk_ref
+  str r0, [r1, CLK_SYS_CTRL_OFST]
+  // Peripheral clock
+  movs r0, 1 // set enable
+  lsls r0, 11
+  adds r0, 0x4 << 5 // src = xosc
+  str r0, [r1, CLK_PERI_CTRL_OFST]
+
+  // Deassert resets for GPIO and UART
+  movs r0, 0b1 << 5 // IO_BANK0 (bit 5)
+  movs r1, 0b1 // UART0 (bit 22)
+  lsls r1, 22
+  orrs r0, r1
+  ldr r1, =(RESETS_BASE + ATOMIC_CLEAR)
+  str r0, [r1, RESET_OFST]
+  ldr r1, =RESETS_BASE
+1:
+  ldr r2, [r1, RESET_DONE_OFST]
+  tst r2, r0
+  beq 1b
+
+  // Configure and enable UART
+  ldr r1, =UART0_BASE
+  movs r0, 6
+  str r0, [r1, UARTIBRD_OFST]
+  movs r0, 33
+  str r0, [r1, UARTFBRD_OFST]
+  movs r0, 0b111 << 4 // 0b11 = word len 8 bits, 0b1 = FIFO enabled
+  str r0, [r1, UARTLCR_H_OFST]
+  ldr r1, =(UART0_BASE + ATOMIC_SET)
+  movs r0, 0b1 // UART enable
+  str r0, [r1, UARTCR_OFST]
+  // Configure GPIO 0 and 1 as TX and RX
+  ldr r1, =IO_BANK0_BASE
+  movs r0, 2 // UART function
+  str r0, [r1, GPIO0_CTRL_OFST]
+  str r0, [r1, GPIO1_CTRL_OFST]
+
+  b octedit
diff --git a/octedit/uart.s b/octedit/uart.s
index e79cbdc..0ab1d20 100644
--- a/octedit/uart.s
+++ b/octedit/uart.s
@@ -3,8 +3,8 @@
 .thumb
 
 .equ UART0_BASE, 0x40034000
-.equ UARTDR_OFST,     0x00
-.equ UARTFR_OFST,     0x18
+.equ UARTDR_OFST, 0x00
+.equ UARTFR_OFST, 0x18
 
 .type uart_send, %function
 .global uart_send